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ltm8025 1 8025fa typical application features applications description 36v, 3a step-down module regulator the ltm ? 8025 is a 36v in , 3a step down module ? con- verter. included in the package are the switching controller, power switches, inductor and all support components. operating over an input voltage range of 3.6v to 36v, the ltm8025 supports an output voltage range of 0.8v to 24v and a switching frequency range of 200khz to 2.4mhz, each set by a single resistor. only the bulk input and output ? lter capacitors are needed to ? nish the design. the low pro? le package (4.32mm) enables utilization of unused space on the bottom of pc boards for high density point of load regulation. the ltm8025 is packaged in a thermally enhanced, compact (15mm 9mm) and low pro? le (4.32mm) over-molded land grid array (lga) package suitable for automated assembly by standard surface mount equipment. the ltm8025 is rohs compliant. l , lt, ltc, ltm, linear technology, the linear logo, module and burst mode are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. n complete step-down switch mode power supply n wide input voltage range: 3.6v to 36v n up to 3a output current n parallelable for increased output current n 0.8v to 24v output voltage n selectable switching frequency: 200khz to 2.4mhz n current mode control n (e4) rohs compliant package with gold pad finish n programmable soft-start n tiny, low pro? le (15mm 9mm 4.32mm) surface mount lga package n automotive battery regulation n power for portable products n distributed supply regulation n industrial supplies n wall transformer regulation ef? ciency output current (ma) 40 80 60 70 100 90 50 8025 ta01b efficiency(%) 0 500 1000 1500 2000 2500 3000 v in = 24v v in run/ss share rt adj v out gnd 8025 ta01a ltm8025 v in * 22v to 36v *running voltage range. please refer to applications information section for start-up details v out 12v at 3a 47.5k 34.8k 4.7 f 22 f pgood sync aux bias
ltm8025 2 8025fa absolute maximum ratings v in , run/ss voltage .................................................36v adj, rt, share voltage .............................................6v v out , aux .................................................................25v pgood, sync...........................................................30v bias ..........................................................................25v v in + bias .................................................................56v maximum junction temperature (note 2) ............ 125c solder temperature ............................................... 245c (note 1) order information pin configuration gnd 1 a b c bank 1 bank 2 bank 3 d e f g h j k l 234 lga package 70-pin (15mm s 9mm s 4.32mm) 567 v out v in rt share pgood adj sync run/ss aux bias t jmax = 125c, ja = 24.4c/w, jc(bottom) = 11.5c/w, jc(top) = 42.7c/w, jb = 18.7c/w values determined per jesd51-9, max output power weight = 1.8 grams electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 12v, run/ss = 12v, bias = 3v unless otherwise noted. (note 2) parameter conditions min typ max units minimum input voltage l 3.6 v output dc voltage 0 < i out 3a; r adj open 0 < i out 3a; r adj = 16.9k; v in = 32v 0.8 24 v v output dc current v out = 3.3v 0 3 a quiescent current into v in run/ss = 0v not switching bias = 0v, not switching 0.01 25 85 1 60 150 a a a quiescent current into bias run/ss = 0v not switching bias = 0v, not switching 0.01 65 0 0.5 120 5 a a a line regulation 5.5v < v in < 36v, i out = 1a 0.3 % load regulation 0a < i out < 3a 0.4 % lead free finish tray part marking package description temperature range ltm8025ev#pbf ltm8025ev#pbf 8025v 70-lead (15mm 9mm 4.32mm) lga C40c to 125c ltm8025iv#pbf ltm8025iv#pbf 8025v 70-lead (15mm 9mm 4.32mm) lga C40c to 125c ltm8025mpv#pbf ltm8025mpv#pbf 8025mpv 70-lead (15mm 9mm 4.32mm) lga C55c to 125c consult ltc marketing for parts speci? ed with wider operating temperature ranges. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/
ltm8025 3 8025fa electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm8025e is guaranteed to meet performance speci? cations from 0c to 125c internal. speci? cations over the full C40c to 125c internal operating temperature range are assured by design, parameter conditions min typ max units output voltage ripple (rms) 0a < i out < 3a 10 mv switching frequency r t = 45.3k 775 khz voltage (at adj pin) l 775 770 790 805 810 mv mv current out of adj pin adj = 1v, v out = 0v 2 a minimum bias voltage for proper operation 2 2.8 v run/ss pin current run/ss = 2.5v 5 10 a run input high voltage 2.5 v run input low voltage 0.2 v pgood threshold (at adj pin) v out rising 710 mv pgood leakage current pgood = 30v 0.1 1 a pgood sink current pgood = 0.4v 200 700 a sync input low threshold f sync = 550khz 0.5 v sync input high threshold f sync = 550khz 0.7 v sync bias current sync = 0v 0.1 a the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. v in = 12v, run/ss = 12v, bias = 3v unless otherwise noted. (note 2) characterization and correlation with statistical process controls. the ltm8025i is guaranteed to meet speci? cations over the full C40c to 125c internal operating temperature range. the ltm8025mp is guaranteed to meet speci? cations over the full C55c to 125c internal operating temperature range. note that the maximum internal temperature is determined by speci? c operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors.
ltm8025 4 8025fa 40 80 60 70 100 90 50 efficiency(%) 0 500 1000 1500 2000 2500 3000 8025 g04 12v in 24v in 32v in load current (ma) typical performance characteristics 2.5v out ef? ciency 3.3v out ef? ciency 5v out ef? ciency 8v out ef? ciency 12v out ef? ciency 18v out ef? ciency bias current vs load current 2.5v out bias current vs load current 3.3v out bias current vs load current 5v out 40 80 60 70 100 90 50 efficiency(%) 0 500 1000 1500 2000 2500 3000 8025 g01 5v in 12v in 24v in 32v in load current (ma) 40 80 60 70 100 90 50 efficiency(%) 0 500 1000 1500 2000 2500 3000 8025 g02 5.5v in 12v in 24v in 32v in load current (ma) 40 80 60 70 100 90 50 efficiency(%) 0 500 1000 1500 2000 2500 3000 8025 g03 12v in 24v in 32v in load current (ma) 40 80 60 70 100 90 50 efficiency(%) 0 500 1000 1500 2000 2500 3000 8025 g05 16v in 24v in 32v in load current (ma) 40 80 60 70 100 90 50 efficiency(%) 0 500 1000 1500 2000 2500 3000 8025 g06 24v in 32v in load current (ma) 8025 g07 load current (ma) 0 5 25 20 15 10 bias current (ma) 0 1000 2000 3000 12v in 24v in 8025 g08 load current (ma) 0 5 30 25 20 15 10 bias current (ma) 0 1000 2000 3000 12v in 24v in 8025 g09 load current (ma) 0 5 40 35 25 20 30 15 10 bias current (ma) 0 1000 2000 3000 12v in 24v in t a = 25c, unless otherwise noted.
ltm8025 5 8025fa typical performance characteristics bias current vs load current 8v out bias current vs load current 12v out bias current vs load current 18v out input current vs load current 2.5v out input current vs load current 3.3v out input current vs load current 5v out input current vs load current 8v out input current vs load current 12v out input current vs load current 18v out 8025 g10 load current (ma) 0 80 70 60 50 40 20 30 10 bias current (ma) 0 1000 2000 3000 12v in 24v in 8025 g11 load current (ma) bias current (ma) 0 1000 2000 3000 0 70 60 50 40 20 30 10 24v in 8025 g12 load current (ma) 0 120 100 80 60 40 20 bias current (ma) 0 500 1000 1500 24v in 8025 g13 5v in 12v in 24v in 32v in load current (ma) 0 500 2500 2000 1500 1000 input current (ma) 0 1000 2000 3000 8025 g14 5.5v in 12v in 24v in 32v in load current (ma) 0 500 2500 2000 1500 1000 input current (ma) 0 1000 2000 3000 8025 g15 12v in 24v in 32v in load current (ma) 0 400 600 800 200 1600 1400 1200 1000 input current (ma) 0 1000 2000 3000 8025 g16 12v in 24v in 32v in load current (ma) 0 500 2500 2000 1500 1000 input current (ma) 0 1000 2000 3000 8025 g17 16v in 24v in 32v in load current (ma) 0 500 3000 2500 2000 1500 1000 input current (ma) 0 1000 2000 3000 8025 g18 24v in 32v in load current (ma) 0 500 3000 2500 2000 1500 1000 input current (ma) 0 1000 2000 3000 t a = 25c, unless otherwise noted.
ltm8025 6 8025fa 8025 g22 load current (ma) 4.0 6.5 7.5 7.0 6.0 5.5 5.0 4.5 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled typical performance characteristics input current vs input voltage output shorted minimum input running voltage vs v out , i out = 3a minimum input voltage vs load current, 3.3v out minimum input voltage vs load current, 5v out minimum input voltage vs load current, 8v out minimum input voltage vs load current, 12v out minimum input voltage vs load current, 18v out minimum input voltage vs load current, C3.3v out minimum input voltage vs load current, C5v out input voltage (v) 0 input current (ma) 600 500 300 200 100 400 0 8025 g19 20 10 30 output voltage (v) 01 input voltage (v) 40 35 30 20 10 25 15 5 0 14 71011 8025 g20 15 12 9 813 5 3 26 4 8025 g21 load current (ma) 3.0 3.5 6.0 5.5 5.0 4.5 4.0 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled 8025 g25 load current (ma) 12 32 27 17 22 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled 8025 g26 load current (ma) 0 1 2 3 4 5 6 7 10 9 8 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled 8025 g27 load current (ma) 0 10 14 12 8 6 4 2 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled t a = 25c, unless otherwise noted. 8025 g23 load current (ma) 8.0 10.5 11.0 10.0 9.5 9.0 8.5 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled 8025 g24 load current (ma) 12 13 14 15 16 17 18 19 22 21 20 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled
ltm8025 7 8025fa 8025 g31 load current (ma) 0 5 15 10 45 35 30 25 40 20 temperature rise (c) 0 500 1000 1500 2000 2500 3000 3500 5v in 12v in 24v in 32v in typical performance characteristics minimum input voltage vs load current, C8v out minimum input voltage vs load current, C12v out minimum input voltage vs negative v out junction temperature rise vs load current, 2.5v out junction temperature rise vs load current, 3.3v out junction temperature rise vs load current, 5v out junction temperature rise vs load current, 8v out junction temperature rise vs load current, 12v out junction temperature rise vs load current, 18v out 8025 g28 load current (ma) 0 5 10 15 20 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled 8025 g29 load current (ma) 0 25 30 20 15 10 5 input voltage (v) 0 1000 2000 3000 to run to start run/ss controlled 8025 g13 1a 2a 3a output voltage (v) 0 5 25 20 15 10 input voltage (v) 0 C5 C10 C15 0 500 1000 1500 2000 2500 3000 3500 8025 g32 0 10 60 50 30 40 20 temperature rise (c) 5v in 12v in 24v in 32v in load current (ma) 0 500 1000 1500 2000 2500 3000 3500 8025 g33 load current (ma) 0 5 15 10 50 45 35 30 25 40 20 temperature rise (c) 12v in 24v in 32v in 8025 g34 load current (ma) 0 10 80 70 60 50 30 40 20 temperature rise (c) 0 500 1000 1500 2000 2500 3000 3500 12v in 24v in 32v in t a = 25c, unless otherwise noted. 8025 g35 load current (ma) 0 120 100 80 60 40 20 temperature rise (c) 0 500 1000 1500 2000 2500 3000 16v in 24v in 32v in 8025 g36 load current (ma) 0 100 80 60 40 20 temperature rise (c) 0 500 1000 1500 2000 24v in 32v in
ltm8025 8 8025fa pin functions v out (bank 1): power output pins. apply the output ? lter capacitor and the output load between these pins and gnd pins. gnd (bank 2): tie these gnd pins to a local ground plane below the ltm8025 and the circuit components. in most applications, the bulk of the heat ? ow out of the ltm8025 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. see the pcb layout and thermal considerations sections for more details. return the feedback divider (r adj ) to this net. v in (bank 3): the v in pin supplies current to the ltm8025s internal regulator and to the internal power switch. this pin must be locally bypassed with an external, low esr capacitor; see table 1 for recommended values. aux (pin g5): low current voltage source for bias. in many designs, the bias pin is simply connected to v out . the aux pin is internally connected to v out and is placed adjacent to the bias pin to ease printed circuit board rout- ing. although this pin is internally connected to v out , it is not intended to deliver a high current, so do not draw current from this pin to the load. if this pin is not tied to bias, leave it ? oating. bias (pin h5): the bias pin connects to the internal power bus. connect to a power source greater than 2.8v and less than 25v. if the output is greater than 2.8v, connect this pin there. if the output voltage is less, connect this to a voltage source between 2.8v and 25v. also, make sure that bias + v in is less than 56v. run/ss (pin l5): pull the run/ss pin below 0.2v to shut down the ltm8025. tie to 2.5v or more for normal operation. if the shutdown feature is not used, tie this pin to the v in pin. run/ss also provides a soft-start function; see the applications information section. sync (pin l6): this is the external clock synchronization input. ground this pin for low ripple burst mode operation at low output loads. tie to a stable voltage source greater than 0.7v to disable burst mode operation. do not leave this pin ? oating. tie to a clock source for synchroniza- tion. clock edges should have rise and fall times faster than 1s. see the synchronization section in applications information. rt (pin g7): the rt pin is used to program the switching frequency of the ltm8025 by connecting a resistor from this pin to ground. table 2 gives the resistor values that correspond to the resultant switching frequency. minimize the capacitance at this pin. share (pin h7): tie this to the share pin of another ltm8025 when paralleling the outputs. otherwise, do not connect. pgood (pin j7): the pgood pin is the open-collector output of an internal comparator. pgood remains low until the adj pin is within 10% of the ? nal regulation voltage. pgood output is valid when v in is above 3.6v and run/ss is high. if this function is not used, leave this pin ? oating. adj (pin k7): the ltm8025 regulates its adj pin to 0.79v. connect the adjust resistor from this pin to ground. the value of r adj is given by the equation r adj = 394.21/(v out C 0.79), where r adj is in k.
ltm8025 9 8025fa block diagram operation the ltm8025 is a standalone nonisolated step-down switching dc/dc power supply that can deliver up to 3a of output current. this module provides a precisely regulated output voltage programmable via one external resistor from 0.8v to 25v. the input voltage range is 3.6v to 36v. given that the ltm8025 is a step-down converter, make sure that the input voltage is high enough to support the desired output voltage and load current. as shown in the block diagram, the ltm8025 contains a current mode controller, power switching element, power inductor, power schottky diode and a modest amount of input and output capacitance. the ltm8025 is a ? xed frequency pwm regulator. the switching frequency is set by simply connecting the appropriate resistor value from the rt pin to gnd. an internal regulator provides power to the control circuitry. the bias regulator normally draws power from the v in pin, but if the bias pin is connected to an external volt- age higher than 2.8v, bias power will be drawn from the external source (typically the regulated output voltage). this improves ef? ciency. the run/ss pin is used to place the ltm8025 in shutdown, disconnecting the output and reducing the input current to less than 1a. to further optimize ef? ciency, the ltm8025 automatically switches to burst mode ? operation in light load situations. between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to 50a in a typical application. the oscillator reduces the ltm8025s operating frequency when the voltage at the adj pin is low. this frequency foldback helps to control the output current during start- up and overload. the ltm8025 contains a power good comparator which trips when the adj pin is at roughly 90% of its regulated value. the pgood output is an open-collector transistor that is off when the output is in regulation, allowing an external resistor to pull the pgood pin high. power good is valid when the ltm8025 is enabled and v in is above 3.6v. the ltm8025 is equipped with a thermal shutdown that will inhibit power switching at high junction tempera- tures. the activation threshold of this function, however, is above 125c to avoid interfering with normal operation. thus, prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device. 8025 bd v in 8.2h 4.4f 0.2f current mode controller run/ss share sync aux bias gnd rt adj pgood v out 15pf 499k
ltm8025 10 8025fa applications information for most applications, the design process is straight forward, summarized as follows: 1. look at table 1 and ? nd the row that has the desired input range and output voltage. 2. apply the recommended c in , c out , r adj and r t values. 3. connect bias as indicated. while these component combinations have been tested for proper operation, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. bear in mind that the maximum output current is limited by junction tempera- ture, the relationship between the input and output voltage magnitude and polarity and other factors. please refer to the graphs in the typical performance characteristics section for guidance. the maximum frequency (and attendant r t value) at which the ltm8025 should be allowed to switch is given in table 1 in the f max column, while the recommended frequency (and r t value) for optimal ef? ciency over the given input condition is given in the f optimal column. there are additional conditions that must be satis? ed if the synchronization function is used. please refer to the synchronization section for details. capacitor selection considerations the c in and c out capacitor values in table 1 are the minimum recommended values for the associated oper- ating conditions. applying capacitor values below those indicated in table 1 is not recommended, and may result in undesirable operation. using larger values is generally acceptable, and can yield improved dynamic response, if it is necessary. again, it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental conditions. ceramic capacitors are small, robust and have very low esr. however, not all ceramic capacitors are suitable. x5r and x7r types are stable over temperature and ap- plied voltage and give dependable service. other types, including y5v and z5u have very large temperature and voltage coef? cients of capacitance. in an application cir- cuit they may have only a small fraction of their nominal capacitance resulting in much higher output voltage ripple than expected. ceramic capacitors are also piezoelectric. in burst mode operation, the ltm8025s switching frequency depends on the load current, and can excite a ceramic capacitor at audio frequencies, generating audible noise. since the ltm8025 operates at a lower current limit during burst mode operation, the noise is typically very quiet to a casual ear. if this audible noise is unacceptable, use a high perfor- mance electrolytic capacitor at the output. it may also be a parallel combination of a ceramic capacitor and a low cost electrolytic capacitor. a ? nal precaution regarding ceramic capacitors concerns the maximum input voltage rating of the ltm8025. a ceramic input capacitor combined with trace or cable inductance forms a high q (under damped) tank circuit. if the ltm8025 circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possi- bly exceeding the devices rating. this situation is easily avoided; see the hot-plugging safely section. frequency selection the ltm8025 uses a constant frequency pwm architec- ture that can be programmed to switch from 200khz to 2.4mhz by using a resistor tied from the rt pin to ground. table 2 provides a list of r t resistor values and their re- sultant frequencies.
ltm8025 11 8025fa applications information table 1: recommended component values and con? guration (t a = 25c) v in v out c in c out r adj bias f optimal r t(optimal) f max r t(min) 3.6v to 36v 0.8v 10f, 50v, 1210 4 100f, 6.3v, 1210 open 2.8v to 25v 230khz 182k 250khz 169k 3.6v to 36v 1v 10f, 50v, 1210 4 100f, 6.3v, 1210 1.87m 2.8v to 25v 240khz 174k 285khz 147k 3.6v to 36v 1.2v 10f, 50v, 1210 4 100f, 6.3v, 1210 953k 2.8v to 25v 255khz 162k 315khz 130k 3.6v to 36v 1.5v 10f, 50v, 1210 4 100f, 6.3v, 1210 549k 2.8v to 25v 270khz 154k 360khz 113k 3.6v to 36v 1.8v 10f, 50v, 1210 3 100f, 6.3v, 1210 383k 2.8v to 25v 285khz 147k 420khz 95.3k 4.1v to 36v 2.5v 4.7f, 50v, 1206 2 100f, 6.3v, 1210 226k 2.8v to 25v 300khz 137k 540khz 71.5k 5.3v to 36v 3.3v 4.7f, 50v, 1206 100f, 6.3v, 1210 154k aux 345khz 118k 675khz 54.9k 7.5v to 36v 5v 4.7f, 50v, 1206 100f, 6.3v, 1206 93.1k aux 425khz 93.1k 950khz 36.5k 10.5v to 36v 8v 4.7f, 50v, 1206 47f, 16v, 1210 54.9k aux 550khz 69.8k 1.45mhz 20.5k 16v to 36v 12v 2.2f, 50v, 1206 22f, 16v, 1210 34.8k aux 760khz 47.5k 2.3mhz 9.09k 23v to 36v 18v 2.2f, 50v, 1206 22f, 25v, 1812 22.6k aux 800khz 44.2k 2.4mhz 8.25k 31v to 36v 24v 1f, 50v, 1206 22f, 25v, 1812 16.5k 2.8v to 25v 1mhz 34k 2.4mhz 8.25k 3.6v to 15v 0.8v 10f, 25v, 1210 4 100f, 6.3v, 1210 open v in 230khz 182k 575khz 66.5k 3.6v to 15v 1v 10f, 25v, 1210 4 100f, 6.3v, 1210 1.87m v in 240khz 174k 660khz 56.2k 3.6v to 15v 1.2v 10f, 25v, 1210 4 100f, 6.3v, 1210 953k v in 255khz 162k 760khz 47.5k 3.6v to 15v 1.5v 10f, 25v, 1210 4 100f, 6.3v, 1210 549k v in 270khz 154k 840khz 42.2k 3.6v to 15v 1.8v 10f, 25v, 1210 4 100f, 6.3v, 1210 383k v in 285khz 147k 1.0mhz 34k 4.1v to 15v 2.5v 4.7f, 16v, 1206 2 100f, 6.3v, 1210 226k v in 300khz 137k 1.3mhz 23.7k 5.3v to 15v 3.3v 4.7f, 16v, 1206 100f, 6.3v, 1206 154k v in 345khz 118k 1.6mhz 17.8k 7.5v to 15v 5v 4.7f, 16v, 1206 100f, 6.3v, 1206 93.1k v in 425khz 93.1k 2.4mhz 8.25k 10.5v to 15v 8v 2.2v, 25v, 1206 47f, 16v, 1210 54.9k v in 550khz 69.8k 2.4mhz 8.25k 9v to 24v 0.8v 4.7f, 25v, 1206 4 100f, 6.3v, 1210 open v in 270khz 154k 360khz 113k 9v to 24v 1v 4.7f, 25v, 1206 4 100f, 6.3v, 1210 1.87m v in 285khz 147k 410khz 97.6k 9v to 24v 1.2v 4.7f, 25v, 1206 4 100f, 6.3v, 1210 953k v in 295khz 140k 475khz 82.5k 9v to 24v 1.5v 4.7f, 25v, 1206 4 100f, 6.3v, 1210 549k v in 310khz 133k 550khz 69.8k 9v to 24v 1.8v 4.7f, 25v, 1206 3 100f, 6.3v, 1210 383k v in 330khz 124k 620khz 60.4k 9v to 24v 2.5v 4.7f, 25v, 1206 100f, 6.3v, 1206 226k v in 345khz 118k 800khz 44.2k 9v to 24v 3.3v 4.7f, 25v, 1206 100f, 6.3v, 1206 154k aux 425khz 93.1k 1mhz 34k 9v to 24v 5v 4.7f, 25v, 1206 47f, 16v, 1210 93.1k aux 500khz 76.8k 1.4mhz 21.5k 10.5v to 24v 8v 2.2f, 25v, 1206 22f, 16v, 1210 54.9k aux 590khz 64.9k 2.2mhz 9.76k 16v to 24v 12v 2.2f, 50v, 1206 22f, 16v, 1210 34.8k aux 760khz 47.5k 2.3mhz 9.09k 23v to 24v 18v 2.2f, 50v, 1206 22f, 25v, 1812 22.6k aux 800khz 44.2k 2.4mhz 8.25k 18v to 36v 0.8v 1f, 50v, 1206 4 100f, 6.3v, 1210 open 2.8v to 25v 230khz 182k 250khz 169k 18v to 36v 1v 1f, 50v, 1206 4 100f, 6.3v, 1210 1.87m 2.8v to 25v 240khz 174k 285khz 147k 18v to 36v 1.2v 1f, 50v, 1206 4 100f, 6.3v, 1210 953k 2.8v to 25v 255khz 162k 315khz 130k 18v to 36v 1.5v 1f, 50v, 1206 4 100f, 6.3v, 1210 549k 2.8v to 25v 270khz 154k 360khz 113k 18v to 36v 1.8v 1f, 50v, 1206 3 100f, 6.3v, 1210 383k 2.8v to 25v 300khz 137k 420khz 95.3k 18v to 36v 2.5v 1f, 50v, 1206 100f, 6.3v, 1206 226k 2.8v to 25v 345khz 118k 540khz 71.5k 18v to 36v 3.3v 1f, 50v, 1206 100f, 6.3v, 1206 154k aux 385khz 105k 675khz 54.9k 18v to 36v 5v 1f, 50v, 1206 47f, 16v, 1210 93.1k aux 500khz 76.8k 950khz 36.5k 18v to 36v 8v 2.2f, 50v, 1206 22f, 16v, 1210 54.9k aux 550khz 69.8k 1.45mhz 20.5k 18v to 36v 12v 2.2f, 50v, 1206 22f, 16v, 1210 34.8k aux 760khz 47.5k 2.3mhz 9.09k 4.75v to 32v C3.3v 4.7f, 50v, 1206 100f, 6.3v, 1210 154k aux 345khz 118k 675khz 54.9k 7v to 31v C5v 4.7f, 50v, 1206 100f, 6.3v, 1210 93.1k aux 425khz 93.1k 950khz 36.5k 15v to 28v C8v 4.7f, 50v, 1206 47f, 16v, 1210 54.9k aux 550khz 69.8k 1.45mhz 20.5k 20v to 24v C12v 4.7f, 50v, 1206 22f, 16v, 1210 34.8k aux 760khz 47.5k 2.3mhz 9.09k note: an input bulk capacitance is required. do not allow v in + bias to exceed 56v. refer to the typical performance characteristics section for load conditions.
ltm8025 12 8025fa applications information table 2. switching frequency vs r t value switching frequency r t value 0.2mhz 215k 0.3mhz 137k 0.4mhz 100k 0.5mhz 76.8k 0.6mhz 63.4k 0.7mhz 52.3k 0.8mhz 44.2k 0.9mhz 38.3k 1mhz 34.0k 1.2mhz 26.7k 1.4mhz 21.5k 1.6mhz 17.8k 1.8mhz 14.7k 2mhz 12.1k 2.2mhz 9.76k 2.4mhz 8.25k operating frequency tradeoffs it is recommended that the user apply the optimal r t value given in table 1 for the input and output operating condition. system level or other considerations, however, may necessitate another operating frequency. while the ltm8025 is ? exible enough to accommodate a wide range of operating frequencies, a haphazardly chosen one may result in undesirable operation under certain operating or fault conditions. a frequency that is too high can reduce ef? ciency, generate excessive heat or even damage the ltm8025 if the output is overloaded or short circuited. a frequency that is too low can result in a ? nal design that has too much output ripple or too large of an output capacitor. bias pin considerations the bias pin is used to provide drive power for the in- ternal power switching stage and operate other internal circuitry. for proper operation, it must be powered by at least 2.8v. if the output voltage is programmed to 2.8v or higher, bias may be simply tied to aux. if v out is less than 2.8v, bias can be tied to v in or some other voltage source. if the bias pin voltage is too high, the ef? ciency of the ltm8025 may suffer. the optimum bias voltage is dependent upon many factors, such as load current, input voltage, output voltage and switching frequency, but 4v to 5v works well in many applications. in all cases, ensure that the maximum voltage at the bias pin is less than 25v and that the sum of v in and bias is less than 56v. if bias power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. load sharing two or more ltm8025s may be paralleled to produce higher currents. to do this, tie the v in , adj, v out and share pins of all the paralleled ltm8025s together. to ensure that paralleled modules start up together, the run/ss pins may be tied together, as well. if the run/ss pins are not tied together, make sure that the same valued soft-start capacitors are used for each module. current sharing can be improved by synchronizing the ltm8025s. an example of two ltm8025s con? gured for load sharing is given in the typical applications section. burst mode operation to enhance ef? ciency at light loads, the ltm8025 auto- matically switches to burst mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. during burst mode operation, the ltm8025 delivers single cycle bursts of current to the output capacitor followed by sleep periods where the output power is delivered to the load by the output capacitor. in addition, v in and bias quiescent currents are each reduced to microamps during the sleep time. as the load current decreases towards a no load condition, the percentage of time that the ltm8025 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher ef? ciency. burst mode operation is enabled by tying sync to gnd. to disable burst mode operation, tie sync to a stable voltage above 0.7v. do not leave the sync pin ? oating . minimum input voltage the ltm8025 is a step-down converter, so a minimum amount of headroom is required to keep the output in regulation. in addition, the input voltage required to turn
ltm8025 13 8025fa applications information figure 1. to soft-start the ltm8025, add a resistor and capacitor to the run/ss pin on is higher than that required to run, and depends upon whether the run/ss is used. as shown in the typical performance characteristics section, the minimum input voltage to run a 3.3v output at light load is only about 3.6v, but, if the run/ss is pulled up to v in , it takes 5.5v in to start. if the ltm8025 is enabled with the run/ss pin, the minimum voltage to start at light loads is lower, about 4.3v. similar curves detailing this behavior of the ltm8025 for other outputs are also included in the typical performance characteristics section. soft-start the run/ss pin can be used to soft-start the ltm8025, reducing the maximum input current during start-up. the run/ss pin is driven through an external rc ? lter to cre- ate a voltage ramp at this pin. figure 1 shows the start-up and shutdown waveforms with the soft-start circuit. by choosing an appropriate rc time constant, the peak start- up current can be reduced to the current that is required to regulate the output, with no overshoot. choose the value of the resistor so that it can supply at least 20a when the run/ss pin reaches 2.5v. i l 1a/div v run/ss 2v/div v out 2v/div 8025 f01 2ms/div run/ss run run 15k 0.22f frequency foldback the ltm8025 is equipped with frequency foldback which acts to reduce the thermal and energy stress on the internal power elements during a short circuit or output overload condition. if the ltm8025 detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. this in turn limits the amount of energy that can be delivered to the load under fault. during the start-up time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. synchronization the internal oscillator of the ltm8025 can be synchronized by applying an external 250khz to 2mhz clock to the sync pin. do not leave this pin ? oating. when synchronizing the ltm8025, select an r t resistor value that corresponds to an operating frequency 20% lower than the intended synchronization frequency (see the frequency selection section). in addition to synchronization, the sync pin controls burst mode behavior. if the sync pin is driven by an external clock, or pulled up above 0.7v, the ltm8025 will not en- ter burst mode operation, but will instead skip pulses to maintain regulation instead. shorted input protection care needs to be taken in systems where the output will be held high when the input to the ltm8025 is absent. this may occur in battery charging applications or in battery backup systems where a battery or some other supply is diode ored with the ltm8025s output. if the v in pin is allowed to ? oat and the shdn pin is held high (either by a logic signal or because it is tied to v in ), then the ltm8025s internal circuitry will pull its quiescent current through its internal power switch. this is ? ne if your system can tolerate a few milliamps in this state. if you ground the run/ss pin, the input current will drop to essentially zero. however, if the v in pin is grounded while the output is held high, then parasitic diodes inside the ltm8025 can pull large currents from the output through the v in pin. figure 2 shows a circuit that will run only when the input voltage is present and that protects against a shorted or reversed input. pcb layout most of the headaches associated with pcb layout have been alleviated or even eliminated by the high level of integration of the ltm8025. the ltm8025 is neverthe- less a switching power supply, and care must be taken to minimize emi and ensure proper operation. even with the
ltm8025 14 8025fa bias aux v out v in gnd gnd 8025 f03 gnd thermal vias to gnd r t r adj pgood c in c out sync run/ss applications information figure 2. the input diode prevents a shorted input from discharging a backup battery tied to the output. it also protects the circuit from a reversed input. the ltm8025 runs only when the input is present. high level of integration, you may fail to achieve speci? ed operation with a haphazard or poor layout. see figure 3 for a suggested layout. ensure that the grounding and heatsinking are acceptable. 1. place the r adj and r t resistors as close as possible to their respective pins. 2. place the c in capacitor as close as possible to the v in and gnd connection of the ltm8025. 3. place the c out capacitor as close as possible to the v out and gnd connection of the ltm8025. 4. place the c in and c out capacitors such that their ground current ? ow directly adjacent or underneath the ltm8025. 5. connect all of the gnd connections to as large a copper pour or plane area as possible on the top layer. avoid breaking the ground connection between the external components and the ltm8025. 6. for good heatsinking, use vias to connect the gnd cop- per area to the boards internal ground planes. liberally distribute these gnd vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. pay attention to the location and density of the thermal vias in figure 3. the ltm8025 can bene? t from the heat-sinking afforded by vias that connect to internal gnd planes at these locations, due to their proximity to internal power handling components. the optimum number of thermal vias depends upon the printed circuit board design. for example, a board figure 3. layout showing suggested external components, gnd plane and thermal vias. might use very small via holes. it should employ more thermal vias than a board that uses larger holes. hot-plugging safely the small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of ltm8025. however, these capacitors can cause problems if the ltm8025 is plugged into a live supply (see linear technology application note 88 for a complete discussion). the low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt- age at the v in pin of the ltm8025 can ring to more than twice the nominal input voltage, possibly exceeding the ltm8025s rating and damaging the part. if the input supply is poorly controlled or the user will be plugging the ltm8025 into an energized supply, the input network should be designed to prevent this overshoot. this can be accomplished by installing a small resistor in series to v in , but the most popular method of controlling input voltage overshoot is to add an electrolytic bulk capacitor to the v in net. this capacitors relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. the extra capacitor improves low frequency ripple ? ltering and can slightly improve the ef? ciency of the circuit, though it is likely to be the largest component in the circuit. v in run/ss rt adj v out gnd 8025 f02 ltm8025 v in v out aux bias sync
ltm8025 15 8025fa applications information thermal considerations the ltm8025 output current may need to be derated if it is required to operate in a high ambient temperature or deliver a large amount of continuous power. the amount of current derating is dependent upon the input voltage, output power and ambient temperature. the temperature rise curves given in the typical performance characteristics section can be used as a guide. these curves were generated by a ltm8025 mounted to a 58cm 2 4-layer fr4 printed circuit board. boards of other sizes and layer count can exhibit different thermal behavior, so it is incumbent upon the user to verify proper operation over the intended systems line, load and environmental operating conditions. the junction to air and junction to board thermal resis- tances given in the pin con? guration diagram may also be used to estimate the ltm8025 internal temperature. these thermal coef? cients are determined for maximum output power per jesd 51-9 jedec standard, test boards for area array surface mount package thermal measure- ments through analysis and physical correlation. bear in mind that the actual thermal resistance of the ltm8025 to the printed circuit board depends upon the design of the circuit board. the die temperature of the ltm8025 must be lower than the maximum rating of 125c, so care should be taken in the layout of the circuit to ensure good heat sinking of the ltm8025. the bulk of the heat ? ow out of the ltm8025 is through the bottom of the module and the lga pads into the printed circuit board. consequently a poor printed circuit board design can cause excessive heating, result- ing in impaired performance or reliability. please refer to the pcb layout section for printed circuit board design suggestions. the ltm8025 is equipped with a thermal shutdown that will inhibit power switching at high junction temperatures. the activation threshold of this function, however, is above 125c to avoid interfering with normal operation. thus, it follows that prolonged or repetitive operation under a condition in which the thermal shutdown activates neces- sarily means that the internal components are subjected to temperatures above the 125c rating for prolonged or repetitive intervals, which may damage or impair the reliability of the device. finally, be aware that at high ambient temperatures the internal schottky diode will have signi? cant leakage current increasing the quiescent current of the ltm8025. typical applications 1.8v step-down converter v in run/ss share rt adj v out gnd 8025 ta02 ltm8025 v in 3.6v to 24v v out 1.8v at 3a 147k 383k 10 f 300 f pgood sync aux bias 2.5v step-down converter v in run/ss share rt adj v out gnd 8025 ta03 ltm8025 v in * 4.1v to 36v v out 2.5v at 3a 137k 226k 4.7 f pgood sync aux bias 3.3v *running voltage range. please refer to applications information section for start-up details 200 f
ltm8025 16 8025fa typical applications 8v step-down converter v in run/ss share rt adj v out gnd 8025 ta04 ltm8025 v in * 11v to 36v v out 8v at 3a 69.8k 54.9k 4.7 f 47 f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details C5v negative output converter v in run/ss share rt adj v out gnd 8025 ta05 ltm8025 v in * 7.5v to 30v v out C5v at 2a 93.1k 93.1k 4.7 f 100 f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details two ltm8025s in paralel, 2.5v at 5.5a v in run/ss share rt adj v out gnd ltm8025 v in * 4.1v to 36v v out 2.5v at 5.6a 3v 137k 113k pgood sync aux bias v in run/ss share rt adj v out gnd 8025 ta06 ltm8025 optional sync 137k 2.2 f 2.2 f 300 f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details note: synchronize the two modules to avoid beat frequencies, if necessary. otherwise, tie each sync to gnd
ltm8025 17 8025fa package description notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. the total number of pads: 70 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature symbol aaa bbb eee tolerance 0.15 0.10 0.05 4.22 ?4.42 detail b detail b substrate mold cap 0.27 ?0.37 3.95 ?4.05 // bbb z z 9 bsc package top view 15 bsc 4 pad 1 corner x y aaa z aaa z detail a 7.62 bsc 1.27 bsc 12.70 bsc lkjhgfedcb package bottom view c(0.30) pad 1 3 pads see notes a 1 2 3 4 5 6 7 detail a 0.635 0.025 sq. 70x s y x eee 0.000 1.270 1.270 2.540 2.540 3.810 3.810 6.350 6.350 3.810 3.810 5.080 5.080 2.540 2.540 1.270 1.270 0.000 lga 70 1007 rev ltmxxxxxx module tray pin 1 bevel package in tray loading orientation component pad ?1 suggested pcb layout top view lga package 70-lead (15mm 9mm 4.32mm) (reference ltc dwg # 05-08-1817 rev ?)
ltm8025 18 8025fa package description pin assignment table (arranged by pin number) pin name pin name pin name pin name pin name pin name a1 v out b1 v out c1 v out d1 v out e1 gnd f1 gnd a2 v out b2 v out c2 v out d2 v out e2 gnd f2 gnd a3 v out b3 v out c3 v out d3 v out e3 gnd f3 gnd a4 v out b4 v out c4 v out d4 v out e4 gnd f4 gnd a5 gnd b5 gnd c5 gnd d5 gnd e5 gnd f5 gnd a6 gnd b6 gnd c6 gnd d6 gnd e6 gnd f6 gnd a7 gnd b7 gnd c7 gnd d7 gnd e7 gnd f7 gnd pin name pin name pin name pin name pin name g1 gnd h1 - j1 v in k1 v in l1 v in g2 gnd h2 - j2 v in k2 v in l2 v in g3 gnd h3 - j3 v in k3 v in l3 v in g4 gnd h4 - j4 - k4 - l4 - g5 aux h5 bias j5 gnd k5 gnd l5 run/ss g6 gnd h6 gnd j6 gnd k6 gnd l6 sync g7 rt h7 share j7 pgood k7 adj l7 gnd package photography
ltm8025 19 8025fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. revision history rev date description page number a 2/10 change to current out of adj operation in electrical characteristics additions to table 1 changes to shorted input protection section changes to related parts table 3 11 13 20
ltm8025 20 8025fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 2009 lt 0310 rev a ? printed in usa related parts part number description comments ltm4600/ltm4602 10a and 6a dc/dc module pin compatible, 4.5v v in 28v, 15mm 15mm 2.8mm lga package ltm4601/ltm4603 12a and 6a dc/dc module pin compatible; remote sensing; pll, tracking and margining, 4.5v v in 28v ltm4604a 4a, low v in dc/dc module 2.375v v in 5.5v, 0.8v v out 5v, 9mm 15mm 2.3mm lga package ltm4606 low emi 6a, 28v dc/dc module 4.5v v in 28v, 0.6v v out 5v, 15mm 15mm 2.8mm lga package ltm8020 200ma, 36v dc/dc module 4v v in 36v, 1.25v v out 5v, 6.25mm 6.25mm 2.32mm lga package ltm8022/ltm8023 1a and 2a, 36v dc/dc module pin compatible 3.6v v in 36v, 0.8v v out 10v, 11.25mm 9mm 2.82mm lga package ltm8027 60v, 4a dc/dc module 4.5v v in 60v; 2.5v v out 24v, 15mm 15mm 4.32mm lga package typical application 3.3v step-down converter v in run/ss share rt adj v out gnd 8025 ta07 ltm8025 v in * 5.5v to 36v v out 3.3v at 3a 118k 154k 4.7 f 100 f pgood sync aux bias *running voltage range. please refer to applications information section for start-up details

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